Title :
On-chip structures for timing measurement and test
Author :
Kinniment, D.J. ; Maevsky, O.V. ; Bystrov, A. ; Russell, G. ; Yakovlev, A.V.
Author_Institution :
Newcastle upon Tyne Univ., UK
Abstract :
This paper describes the use of digitally set delay lines in conjunction with MUTEX time comparison circuits, to measure on-chip signal path timing differences to accuracies of better than 10ps. Three methods of time measurement are described. The first, which uses parallel MUTEXs with a tapped delay line, is analogous to a flash AID converter. The second one is similar to a successive approximation method. Both are fast, and efficient, but the second requires less hardware for a large number of bits. The third technique uses a MUTEX to amplify small time differences to a measurable size. Applications for these techniques include adaptive synchronization and input tests, such as data set-up time conditions that currently require the use of very expensive test hardware. We describe an on-chip method of testing these conditions, using uncorrelated signals whose statistics are known, and accurately selecting the conditions to be tested on-chip.
Keywords :
automatic testing; delay lines; integrated circuit testing; logic testing; synchronisation; timing; MUTEX time comparison circuits; adaptive synchronization; data set-up time conditions; digitally set delay lines; input tests; on-chip signal path; on-chip structures; successive approximation; tapped delay line; timing measurement; uncorrelated signals; Automatic testing; Circuit testing; Clocks; Costs; Delay; Identity-based encryption; System testing; System-on-a-chip; Time measurement; Timing;
Conference_Titel :
Asynchronous Circuits and Systems, 2002. Proceedings. Eighth International Symposium on
Print_ISBN :
0-7695-1540-1
DOI :
10.1109/ASYNC.2002.1000309