A low-complexity power-efficient signaling scheme for chip-to-chip communication

Multi-level signaling can be used to reduce the number of required signal paths. However, it needs more power to combat its impact on bit error rate (BER). It has been shown that coding theory can be used to alleviate this problem. The complexity of these coding schemes is a major concern for high-speed implementation. This paper describes a novel low-complexity method for an analog implementation of a previously proposed coding scheme. This new architecture not only reduces the complexity of the receiver but also improves its performance. Moreover, a more realistic model for the channel, which takes into account the effect of reflection and inter-symbol interference (ISI), is developed. Simulation results show that this scheme provides roughly 5 dB gain over the ordinary 4-PAM scheme for two practical channels in chip-to-chip communication.