DocumentCode
1561752
Title
A framework of evolutionary graph generation system and its application to circuit synthesis
Author
Homma, Naofumi ; Aoki, Takafumi ; Motegi, Makoto ; Higuchi, Tatsuo
Author_Institution
Graduate Sch. of Inf. Sci., Tohoku Univ., Sendai, Japan
Volume
5
fYear
2003
Abstract
This paper presents a generic object-oriented framework of evolutionary graph generation (EGG) for automated arithmetic circuit synthesis. The EGG system can be systematically modified for different design problems by inheriting the framework class templates. The potential of the framework is examined through experimental synthesis of bit-serial arithmetic circuits.
Keywords
circuit optimisation; digital arithmetic; evolutionary computation; logic CAD; object-oriented methods; EGG; automated arithmetic circuit synthesis; bit-serial arithmetic circuits; circuit synthesis; evolutionary graph generation system; framework class templates; generic object-oriented framework; Arithmetic; Circuit synthesis; Design optimization; Genetic algorithms; Genetic programming; Logic circuits; Logic design; Signal processing; Signal synthesis; Tree graphs;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN
0-7803-7761-3
Type
conf
DOI
10.1109/ISCAS.2003.1206231
Filename
1206231
Link To Document