DocumentCode :
1561843
Title :
Post-analysis-based clustering dramatically improves the Fiduccia-Mattheyses algorithm
Author :
Saab, Youssef
Author_Institution :
Comput. Sci. Dept., Missouri Univ., Columbia, MO, USA
fYear :
1993
Firstpage :
22
Lastpage :
27
Abstract :
This paper describes a new partitioning algorithm, BISECT, which is an extension of the Fiduccia-Mattheyses (FM) algorithm that recursively combines clustering and iterative improvement. A post analysis of sequences of moves in one pass generates disjoint subsets of nodes for clustering. After clustering BISECT is applied again on the compacted circuit. BISECT is stabler, achieves results that can be up to 73 times better than FM, and runs in linear time under suitably mild assumptions. BISECT also performs well in comparison with the Kernighan-Lin algorithm and simulated annealing. The empirical results show that BISECT is stable and is not very sensitive to the initial partition. For many random sparse graphs, BISECT achieves 0-cut bisections (balanced partitions)
Keywords :
VLSI; circuit layout CAD; graph theory; integrated circuit layout; iterative methods; logic partitioning; pattern recognition; random processes; simulated annealing; 0-cut bisections; BISECT; Fiduccia-Mattheyses algorithm; Kernighan-Lin algorithm; balanced partitions; clustering; disjoint subsets; empirical results; iterative improvement; linear time; partitioning algorithm; post analysis; random sparse graphs; simulated annealing; Clustering algorithms; Compaction; Costs; Information analysis; Iterative algorithms; Performance analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1993, with EURO-VHDL '93. Proceedings EURO-DAC '93., European
Conference_Location :
Hamburg
Print_ISBN :
0-8186-4350-1
Type :
conf
DOI :
10.1109/EURDAC.1993.410611
Filename :
410611
Link To Document :
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