Title :
A low power charge sharing ROM using dummy bit lines
Author :
Yang, Byung-Do ; Kim, Lee-Sup
Author_Institution :
KAIST, Daejeon, South Korea
Abstract :
This paper proposes a shared-capacitor charge-sharing ROM (SCCS-ROM). The SCCS-ROM reduces the swing voltage using the charge-sharing technique of the charge-sharing ROM (CS-ROM). Although the CS-ROM needs three small capacitors per output, the SCCS-ROM shares the capacitors so that it needs only three capacitors. The SCCS-ROM implements the capacitors using dummy bit lines. This not only increases noise immunity but also reduces power. The simulation results, using 0.35 μm CMOS technology, show that the SCC-SROM reduces power by 8.4% compared to the CS-ROM.
Keywords :
CMOS memory circuits; circuit simulation; integrated circuit design; logic design; logic simulation; low-power electronics; read-only storage; CMOS; CS-ROM capacitors; SCCS-ROM; dummy bit lines; low power ROM; noise immunity; power reduction; read only memory; shared-capacitor charge-sharing ROM; swing voltage reduction; Capacitance; Capacitors; Carbon capture and storage; Chip scale packaging; Energy consumption; MOSFETs; Noise reduction; Read only memory; Switches; Voltage;
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
DOI :
10.1109/ISCAS.2003.1206286
