Title :
PCUBE: A performance driven placement algorithm for low power designs
Author :
Vaishnav, Hirendu ; Pedram, Massoud
Author_Institution :
Dept. of Electr. Eng.-Syst., Univ. of Southern California, Los Angeles, CA, USA
Abstract :
PCUBE, a performance driven placement algorithm for minimizing power consumption, is described. The problem is formulated as a constrained programming problem and is solved in two phases: global optimization and slot assignment. The objective function used during either phase is the total weighted net length, where net weights are calculated as the expected switching activities of gates driving the nets. Constraints on total path delays are also accounted for. On average, PCUBE reduces power consumption due to interconnect by 7% at the expense of 8% increase in the total wire length and 2% increase in circuit delay
Keywords :
circuit layout CAD; constraint handling; delays; logic CAD; minimisation; PCUBE; constrained programming; global optimization; low power designs; minimisation; objective function; performance driven placement algorithm; power consumption; slot assignment; switching activities; total path delays; Algorithm design and analysis; Capacitance; Circuit simulation; Circuit synthesis; Clocks; Computational modeling; Delay; Energy consumption; Memory management; Wire;
Conference_Titel :
Design Automation Conference, 1993, with EURO-VHDL '93. Proceedings EURO-DAC '93., European
Conference_Location :
Hamburg
Print_ISBN :
0-8186-4350-1
DOI :
10.1109/EURDAC.1993.410619
