DocumentCode :
1562489
Title :
Influence of bump geometry, adhesives and pad finishings on the joint resistance of Au bump and A/NCA flip chip interconnection
Author :
Min, Tan Ai ; Lim, Sharon Pei-Siang ; Yeo, Alfred ; Lee, Charles
Author_Institution :
Assembly & Interconnect Technol., Infineon Technol. Asia Pacific Pte Ltd., Singapore
Volume :
2
fYear :
2005
Abstract :
Flip chip assembly using non-conductive adhesives (NCAs) and anisotropic conductive adhesives (ACAs) is gaining importance and acceptance in electronics packaging industry. For this packaging technology, a variety of material combinations is possible involving different bump types and adhesives. One of the challenges is to select a robust flip chip joint configuration to meet desired reliability requirements. In this paper, we report the influence of Au bump types, adhesives and substrate finishings on assembly feasibility and reliability of the flip chip joints. Results showed that bump type and its geometry has a major impact on the daisy chain resistances. The lowest and most consistent joint resistances were obtained with Au stud bumps. The incompatible combination of geometrically flat bumps and silica-filled adhesives was also identified. Resistance stability as a function of stress test was most dependent on the adhesive type used. Substrate pads with Au plating showed greater stability compared to pads with organic solderability preservative (OSP) coating. Based on the results, Au stud bump with non-conductive paste (NCP) has been identified to be the most suitable combination for high I/O and large die application
Keywords :
adhesives; assembling; flip-chip devices; gold; integrated circuit interconnections; integrated circuit packaging; silicon compounds; solders; Au; SiO2; anisotropic conductive adhesives; bump geometry; daisy chain resistances; flip chip assembly; flip chip interconnection; flip chip joints; geometrically flat bumps; gold bump; gold plating; joint resistance; nonconductive adhesives; organic solderability preservative coating; pad finishings; silica-filled adhesives; stress test; substrate finishings; Anisotropic magnetoresistance; Assembly; Conductive adhesives; Electronics packaging; Finishing; Flip chip; Geometry; Gold; Nonconductive adhesives; Stability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Packaging Technology Conference, 2005. EPTC 2005. Proceedings of 7th
Conference_Location :
Singapore
Print_ISBN :
0-7803-9578-6
Type :
conf
DOI :
10.1109/EPTC.2005.1614507
Filename :
1614507
Link To Document :
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