Title :
Accurate rise time and overshoots estimation in RLC interconnects
Author :
Mahmoud, Noha H. ; Ismail, Yehea I.
Author_Institution :
Northwestern Univ., Evanston, IL, USA
Abstract :
A closed form expression for the rise time of a gate driving a distributed RLC line is introduced that is within 8% of dynamic circuit simulations for a wide range of RLC loads. It is shown that the rise time decreases as the inductance effect increases. Also, a closed form expression for the maximum percentage overshoots is introduced that is within 5% error of dynamic circuit simulations. The expressions introduced here are analytical and differentiable over all damping conditions. Hence, these solutions are suitable for design and optimization tools.
Keywords :
VLSI; capacitance; circuit optimisation; circuit simulation; inductance; integrated circuit interconnections; integrated circuit modelling; RLC interconnects; closed form expression; damping conditions; dynamic circuit simulations; inductance effect; optimization tools; overshoots estimation; rise time; Chromium; Circuit simulation; Clocks; Crosstalk; Delay; Inductance; Integrated circuit interconnections; Power grids; Power transmission lines; Voltage;
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
DOI :
10.1109/ISCAS.2003.1206322
