Configurable two-dimensional linear feedback shifter registers for deterministic and random patterns [logic BIST]

Author

Chen, Chien-In Henry ; George, Kiran

Author_Institution

Dept. of Electr. Eng., Wright State Univ., Dayton, OH, USA

Volume

5

fYear

2003

Abstract

A new deterministic built-in self-test (BIST) approach to generate a set of pre-computed test patterns followed by random test patterns is proposed. Given a set of precomputed test patterns, a simple test generator based on configurable two-dimensional (2D) linear feedback shift registers (LFSR) is synthesized to generate the given test set. This configurable 2D LFSR based test generator generates: 1) a deterministic sequence of test patterns for random-pattern-resistant faults, and then 2) random test patterns for random-pattern-detectable faults. The configurable 2D LFSR test generator can be adopted in two basic BIST execution options: test-per-clock (parallel BIST) and test-per-scan (serial BIST).

Keywords

automatic test pattern generation; built-in self test; logic design; logic simulation; logic testing; random sequences; shift registers; LFSR; built-in self-test; configurable 2D linear feedback shifter registers; deterministic test patterns; logic BIST; parallel BIST; pre-computed test patterns; random pattern-detectable faults; random test patterns; random-pattern resistant faults; serial BIST; test generator; test set generation; test-per-clock; test-per-scan; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Costs; Fault detection; Feedback; Hardware; Logic testing; Test pattern generators;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on

Print_ISBN

0-7803-7761-3

Type

conf

DOI

10.1109/ISCAS.2003.1206337

Filename

1206337