Experimental evaluation and validation of a BIST algorithm for characterization of A/D converter performance

Author

Parthasarathy, Kumar L. ; Jin, Le ; Kuyel, Turker ; Price, Dana ; Chen, Degang ; Geiger, Randall

Author_Institution

Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA

Volume

5

fYear

2003

Abstract

A new histogram based algorithm for characterization of analog-to-digital converters has been introduced. The proposed method is based on using a highly nonlinear but stationary signal, which can be easily and practically generated on chip. This not only relaxes the requirement on the signal generator, but also enables the use of fast sources, thereby reducing test time and test costs. Experimental test results on commercially available 10 bit pipelined ADCs indicate that the algorithm can estimate the linearity specifications of the device to within 0.5 LSB by using an input signal of just 2 bit linearity.

Keywords

analogue-digital conversion; built-in self test; integrated circuit testing; signal generators; 10 bit; A/D converter performance characterization; BIST; analog-to-digital converters; device linearity; nonlinear stationary signal; on chip generated test signal; pipelined ADC; signal generator; test cost reduction; test time reduction; Automatic testing; Built-in self-test; Circuit testing; Costs; Histograms; Linearity; Neodymium; Nonlinear equations; Signal generators; Signal processing algorithms;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on

Print_ISBN

0-7803-7761-3

Type

conf

DOI

10.1109/ISCAS.2003.1206343

Filename

1206343