Title :
Systematic test program generation for SoC testing using embedded processor
Author :
Tehranipour, M.H. ; Nourani, M. ; Fakhraie, S.M. ; Afzali-Kusha, A.
Author_Institution :
Center for Integrated Circuits & Syst., Texas Univ. at Dallas, Richardson, TX, USA
Abstract :
Embedded processors are now widely used in system-on-chips. The computational power of such processors and their ease of access to/from other embedded cores can be utilized to test SoCs. This paper presents a software-based testing of embedded cores in a system chip using the embedded processor We present a methodology to systematically generate test programs that test the processor and other cores in system chip. The method requires almost no overhead but provides great flexibility in terms of structural/fault coverage, test mechanism and future reuse.
Keywords :
automatic test software; built-in self test; design for testability; digital signal processing chips; embedded systems; fault diagnosis; instruction sets; integrated circuit testing; system-on-chip; BIST; DFT overhead; DSP processor; SoC testing; computational power; embedded processor; future reuse; instruction subset; software-based testing; structural/fault coverage; system-on-chips; systematic test program generation; test mechanism; Automatic testing; Built-in self-test; Circuit testing; Distributed power generation; Embedded computing; Logic testing; Software testing; System testing; Test pattern generators; Thermal management;
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
DOI :
10.1109/ISCAS.2003.1206344