• DocumentCode
    1563098
  • Title

    A Stochastic Neural Model for Graph Problems: Software and Hardware Implementation

  • Author

    Grossi, Giuliano ; Pedersini, Federico

  • Author_Institution
    Dipartimento di Sci. dell´´Informazione, Universita degli Studi di Milano, Milan
  • Volume
    1
  • fYear
    2005
  • Firstpage
    115
  • Lastpage
    120
  • Abstract
    This article describes a novel neural stochastic model for solving graph problems. The neural system has been tested on random graphs, showing better performance than other well-known heuristics for the same problems. Furthermore, a simplified version of the proposed model has been developed in such a way that it can be easily implemented in hardware using programmable logic chips, such as FPGAs
  • Keywords
    Hopfield neural nets; field programmable gate arrays; graph theory; stochastic processes; FPGA; graph problems; programmable logic chips; random graphs; stochastic neural model; Constraint optimization; Cost function; Electronic mail; Field programmable gate arrays; Hardware; Integrated circuit synthesis; Network synthesis; Programmable logic arrays; Stochastic processes; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Neural Networks and Brain, 2005. ICNN&B '05. International Conference on
  • Conference_Location
    Beijing
  • Print_ISBN
    0-7803-9422-4
  • Type

    conf

  • DOI
    10.1109/ICNNB.2005.1614579
  • Filename
    1614579