DocumentCode
1563162
Title
Synthesis and optimization of interfaces between hardware modules with incompatible protocols
Author
Androutsopoulos, Vassilis ; Clarke, T.J.W. ; Brookes, D.M.
Author_Institution
Dept. of Electr. & Electron. Eng., Imperial Coll., London, UK
Volume
5
fYear
2003
Abstract
In this paper, we present a new algorithm that performs automatic interface synthesis between two synchronous hardware modules with incompatible data communication protocols. We introduce the Data Path State Machine (DPSM) which captures data path dependencies. This allows control logic for data paths to be synthesized which is optimized for bandwidth over multiple transactions.
Keywords
computer interfaces; data communication; finite state machines; high level synthesis; optimisation; protocols; automatic interface synthesis; control logic; data path state machine; incompatible data communication protocol; optimization algorithm; synchronous hardware module; Automata; Bandwidth; Clocks; Consumer electronics; Data engineering; Delay; Delta modulation; Hardware; Logic; Protocols;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN
0-7803-7761-3
Type
conf
DOI
10.1109/ISCAS.2003.1206387
Filename
1206387
Link To Document