DocumentCode
1563181
Title
Multitasking in hardware-software codesign for reconfigurable computer
Author
Wiangtong, T. ; Cheung, P.Y.K. ; Luk, W.
Author_Institution
Electron. Dept., Mahanakorn Univ. of Technol., Bangkok, Thailand
Volume
5
fYear
2003
Abstract
This paper presents a new approach for modeling hardware and software tasks in codesign system. The model has the advantage that the hardware tasks are structured in a way that is compatible with the software tasks. As a result, both hardware and software tasks can be managed in a uniform manner using a single task manager. A hardware/software partitioning and schedule algorithm is developed to automatically map the tasks to the codesign resources to minimize the processing time (makespan). The practicality of our approach is demonstrated with an implementation of dummy tasks for an existing reconfigurable computer, the UltraSONIC. The results show that our approach is promising for a real application.
Keywords
hardware-software codesign; multiprogramming; reconfigurable architectures; scheduling; UltraSONIC; hardware-software codesign; hardware/software partitioning algorithm; makespan; multitasking; reconfigurable computer; task manager; task scheduling algorithm; Application software; Costs; Educational institutions; Field programmable gate arrays; Hardware; Microprocessors; Multitasking; Partitioning algorithms; Processor scheduling; Scheduling algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN
0-7803-7761-3
Type
conf
DOI
10.1109/ISCAS.2003.1206389
Filename
1206389
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