DocumentCode :
1564215
Title :
Register allocation for data flow graphs with conditional branches and loops
Author :
Park, Chaeryung ; Kim, Taewhan ; Liu, C.L.
Author_Institution :
Dept. of Comput. Sci., Illinois Univ., Urbana, IL, USA
fYear :
1993
Firstpage :
232
Lastpage :
237
Abstract :
A new approach to the problem of register allocation in the presence of both conditional branches and loops in a data flow graph is presented. The authors algorithm exploits the possibility of register sharing among mutually exclusive variables using a transformational approach - sets of mutually exclusive variables are transformed into an equivalent set of non-mutually exclusive variables. The transformational approach is extended to the case of data flow graphs with loops. A new register allocation algorithm is then used to produce an allocation for the non-mutually exclusive variables. From such an allocation, a corresponding allocation for the original sets of mutually exclusive variables is derived. Experimental results show that the approach is quite effective
Keywords :
data flow graphs; high level synthesis; logic design; storage allocation; conditional branches; data flow graphs; equivalent set; loops; non-mutually exclusive variables; register allocation algorithm; transformational approach; Arithmetic; Computer science; Data flow computing; Flow graphs; Hardware; High level synthesis; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1993, with EURO-VHDL '93. Proceedings EURO-DAC '93., European
Conference_Location :
Hamburg
Print_ISBN :
0-8186-4350-1
Type :
conf
DOI :
10.1109/EURDAC.1993.410643
Filename :
410643
Link To Document :
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