Title :
Characterization Program for Fast Early Yield Ramp of Memory Technology
Author :
Hall, Michael ; Hunt, Martin ; Prescher, Rico ; Sellier, Gabriel ; Herzog, Holger ; Mitchell, Barry ; Lavangkul, Sudtida ; Satasia, Pratik ; Susanto, Hery
Author_Institution :
Synopsys, Austin, TX
Abstract :
We report on a program to improve early yield ramp for a leading edge memory technology development. Two semi- custom, approximately 4 Mb addressable arrays are used to characterize the random and systematic defectivity of FEOL and BEOL processes. Several examples of fault determination and correction are presented that highlight the efficiency of the combined characterization vehicle and analysis software.
Keywords :
fault diagnosis; integrated circuit yield; semiconductor storage; BEOL process; FEOL process; addressable arrays; analysis software; characterization program; early yield ramp; edge memory technology development; fault determination; Circuit testing; Condition monitoring; Electrical resistance measurement; Failure analysis; Random access memory; Read only memory; Robustness; Silicon; Target tracking; Vehicles;
Conference_Titel :
Advanced Semiconductor Manufacturing Conference, 2008. ASMC 2008. IEEE/SEMI
Conference_Location :
Cambridge, MA
Print_ISBN :
978-1-4244-1964-7
Electronic_ISBN :
1078-8743
DOI :
10.1109/ASMC.2008.4529047
