DocumentCode
1564775
Title
Interconnect Etch Tool Sensitivity to Wafer Backside Composition and Process Induced Defects
Author
Frankwicz, P.S. ; Plourde, C. ; Rothwell, S. ; Kennedy, L. ; Moutinho, T.
Author_Institution
Nat. Semicond. Corp., Portland, ME
fYear
2008
Firstpage
301
Lastpage
304
Abstract
Semiconductor manufacturing tools exhibit complex responses to changes in wafer backside chemical composition and quality that result in process tool malfunctions. This can result in costly scrap wafers during processing and wafer yield degradation by process induced defects. This paper details a process - manufacturing excursion involving a wafer backside etch process that negatively impacted manufacturing on metal interconnect etch process toolsets.
Keywords
etching; integrated circuit interconnections; integrated circuit yield; machine tools; interconnect etch tool sensitivity; manufacturing excursion; metal interconnect etch process toolsets; process induced defects; process tool malfunctions; scrap wafers; semiconductor manufacturing tools; wafer backside composition; wafer backside etch process; wafer yield degradation; CMOS technology; Manufacturing processes; Production; Rough surfaces; Semiconductor device manufacture; Silicon; Substrates; Surface roughness; Surface texture; Wet etching;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Semiconductor Manufacturing Conference, 2008. ASMC 2008. IEEE/SEMI
Conference_Location
Cambridge, MA
ISSN
1078-8743
Print_ISBN
978-1-4244-1964-7
Electronic_ISBN
1078-8743
Type
conf
DOI
10.1109/ASMC.2008.4529058
Filename
4529058
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