DocumentCode
1564953
Title
An application of systolic array design architecture to switched capacitor filter circuits
Author
Raut, R. ; Bhattacharrya, B.B. ; Faruque, S.M.
Author_Institution
Concordia Univ., Montreal, Que., Canada
fYear
1989
Firstpage
2401
Abstract
Introduces a systolic array architecture (SAA) to the design of switched capacitor (SC) filter circuits. Methods of implementing parasitic insensitive systolic SC filters are given. Practical design examples are considered. Simulation results using a circuit extraction program in a LSI/VLSI workstation for a second-order filter are given
Keywords
active filters; circuit CAD; switched capacitor filters; LSI/VLSI workstation; circuit extraction program; parasitic insensitive systolic SC filters; second-order filter; simulation results; switched capacitor filter circuits; systolic array design architecture; Clocks; Digital signal processing; Filters; Integrated circuit interconnections; Large scale integration; Switched capacitor circuits; Switches; Switching circuits; Systolic arrays; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, 1989. ICASSP-89., 1989 International Conference on
Conference_Location
Glasgow
ISSN
1520-6149
Type
conf
DOI
10.1109/ICASSP.1989.266951
Filename
266951
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