DocumentCode
1564979
Title
Scenario-based verification for component-based embedded software designs
Author
Jun, Hu ; Xiaofeng, Yu ; Yan, Zhang ; Tian, Zhang ; Linzhang, Wang ; Xuandong, Li ; Guoliang, Zheng
Author_Institution
Dept. of Comput. Sci. & Technol., Nanjing Univ., China
fYear
2005
Firstpage
240
Lastpage
247
Abstract
In this paper, for embedded software systems we consider the problem of checking component-based designs for scenario-based specifications. The component-based designs are modelled by interface automaton networks which consist of a set of interface automata synchronized by shared actions, and the scenario-based specifications are specified by UML sequence diagrams. Based on investigating the reachability graph of the state space of the interface automaton networks, we develop the algorithms to check the existential consistency and the mandatory existential consistency including the forward, backward, and bidirectional mandatory existential consistency.
Keywords
Unified Modeling Language; automata theory; embedded systems; formal specification; object-oriented programming; program verification; reachability analysis; state-space methods; UML sequence diagram; component-based embedded software; interface automaton network; reachability graph; scenario-based verification; state space; Automata; Automotive engineering; Computer science; Embedded software; Embedded system; Laboratories; Medical services; Software design; State-space methods; Unified modeling language;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Processing, 2005. ICPP 2005 Workshops. International Conference Workshops on
ISSN
1530-2016
Print_ISBN
0-7695-2381-1
Type
conf
DOI
10.1109/ICPPW.2005.78
Filename
1488701
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