DocumentCode
1565007
Title
Construction of Autonomous Decentralized Control UPS system with HW/SW Codesign using FPGA based Hardware Controller
Author
Saito, Tsuyoshi ; Doi, Nobuaki ; Fujii, Wataru ; Yokoyama, Tomoki
Author_Institution
Tokyo Denki Univ., Saitama
fYear
2007
Firstpage
1665
Lastpage
1669
Abstract
Design concept of FPGA based hardware controller with HW/SW codesign for autonomous decentralized control UPS system is proposed. Progress of FPGA technology makes it possible to include the software macro CPU core into the FPGA chip, a high flexibility can be realized for the construction of the control processor in power electronics application. In the proposed method, all the control system is implemented in one FPGA chip. Complicated calculations are assigned to hardware calculation logic, and the parallel processing circuit makes it possible to realize minimizing the calculation time. Also Nios II CPU core is implemented in the same FPGA chip, and the software development can be applied for non-time critical calculations. The advantages of the proposed system is discussed through simulations and experiments.
Keywords
control system synthesis; decentralised control; field programmable gate arrays; hardware-software codesign; macros; parallel processing; power electronics; uninterruptible power supplies; FPGA based hardware; HW-SW codesign; Nios II CPU core; UPS system; autonomous decentralized control; control processor; hardware calculation logic; parallel processing circuit; power electronics; software macro CPU core; Application software; Control systems; Distributed control; Field programmable gate arrays; Hardware; Logic circuits; Parallel processing; Power electronics; Process control; Uninterruptible power systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Electronics Specialists Conference, 2007. PESC 2007. IEEE
Conference_Location
Orlando, FL
ISSN
0275-9306
Print_ISBN
978-1-4244-0654-8
Electronic_ISBN
0275-9306
Type
conf
DOI
10.1109/PESC.2007.4342247
Filename
4342247
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