Sigma-delta A/D and D/A for high speed voiceband modems

A description is given of the key aspects of the design of a single chip sigma-delta analog front end (AFE) for high-speed voiceband modem applications. The AFE includes a transmit channel D/A converter and a receive channel A/D converter, both operating at a sampling rate of 9600 Hz. The circuit is being fabricated using a combination of custom and semicustom cells designed for 1.5-μm CMOS technology. The A/D modulator has a fully differential switched-capacitor (SC) architecture using a special sampling and integrating mechanism. The design reduces the settling time requirement of the SC circuit without sacrificing the signal-to-quantization-noise ratio (SQNR). Critical impairments of the analog components of the modulator are carefully analyzed, simulated, and traded-off. The decimation and interpolation processes are partitioned in several stages with the intermediate sample rates arranged to achieve the required SQNR at minimum hardware cost. With an oversampling ratio of 128, the simulated peak SQNR is better than 76 dB. Performance is targeted for high-speed data modems such as FAX or V.29, and the design can easily be enhanced to accommodate the more stringent requirements of a V.32 modem