DocumentCode
1565398
Title
High Power Density Voltage Divider and Its Application in Two-Stage Server VR
Author
Sun, Julu ; Xu, Ming ; Lee, Fred C. ; Ying, Yucheng
Author_Institution
Virginia Polytech. Inst. & State Univ., Blacksburg
fYear
2007
Firstpage
1872
Lastpage
1877
Abstract
This paper starts with the two-stage Voltage-Regulator (VR) solution for future server microprocessors. By using two-stage solution, high efficiency and high power density VR can be put as close as the microprocessor to eliminate the interconnection effect. Then, high efficiency high power density voltage divider which is served as the 1st stage is analyzed and optimal design is illustrated. Finally, a 2500 W/in3 interleaved voltage divider with 97~98% efficiency is experimentally verified.
Keywords
computer power supplies; microprocessor chips; power convertors; power electronics; voltage dividers; voltage regulators; buck convertor; high-power density voltage divider; interleaved voltage divider; server microprocessors; two-stage server voltage-regulator; Capacitors; Connectors; Inductors; Microprocessors; Power electronics; Power system interconnection; Sockets; Sun; Virtual reality; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Electronics Specialists Conference, 2007. PESC 2007. IEEE
Conference_Location
Orlando, FL
ISSN
0275-9306
Print_ISBN
978-1-4244-0654-8
Electronic_ISBN
0275-9306
Type
conf
DOI
10.1109/PESC.2007.4342287
Filename
4342287
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