• DocumentCode
    156574
  • Title

    A low-area digitalized channel selection filter for DSRC system

  • Author

    Hung-Wen Lin ; Jin-Yi Lin ; Min-Tai Chuang

  • Author_Institution
    Dept. of Electr. Eng., YuanZe Univ., Chungli, Taiwan
  • fYear
    2014
  • fDate
    28-30 April 2014
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper proposes a low-area digitalized band-pass filter (BPF) for the DSRC Receiver. The resonance of active inductor and MOS varactor are utilized to generate band-pass filtering characteristics. To apply for different passband, both the inductance of the inductor and the capacitance of the varctor are designed to be adjusted via digital controls. Band selectivity is raised by cascading stages of BPF cell. In 0.18um CMOS technology, a 7bits 6-stage BPF template occupies an active area of 0.16mm2 and consumes a power of 14.8mW under 1.8V of supplies. The center frequency is ranged form 27MHz to 41MHz with an average frequency resolution of 0.11MHz and the adjacent channel suppression is -16dB@ 40±2.5MHz. The input third-order intercept point is 6dbm.
  • Keywords
    CMOS integrated circuits; MOS capacitors; band-pass filters; digital control; BPF; CMOS technology; DSRC system; MOS varactor; active inductor; adjacent channel suppression; band selectivity; band-pass filter; center frequency; digital controls; frequency 0.11 MHz; frequency 27 MHz to 41 MHz; frequency resolution; low-area digitalized channel selection filter; power 14.8 mW; size 0.16 mm; size 0.18 mum; third-order intercept point; voltage 1.8 V; Active inductors; Band-pass filters; Frequency control; Frequency shift keying; Gain; Passband; Varactors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, Automation and Test (VLSI-DAT), 2014 International Symposium on
  • Conference_Location
    Hsinchu
  • Type

    conf

  • DOI
    10.1109/VLSI-DAT.2014.6834882
  • Filename
    6834882