DocumentCode :
1566542
Title :
Retiming by combination of relocation and clock delay adjustment
Author :
Martin, Hans-Georg
Author_Institution :
FhG Inst. IIS/EAS, Dresden, Germany
fYear :
1993
Firstpage :
384
Lastpage :
389
Abstract :
Combining existing retiming techniques in a single method is a promising way to exploit the optimization potential of all these techniques. The author´s method, which joins together the techniques of relocation and clock delay adjustment, is such an approach towards timing improvement of synchronous sequential circuits. The related linear programming approach is presented, and experimental results for benchmarks are shown
Keywords :
delays; linear programming; logic CAD; performance evaluation; sequential circuits; timing; benchmarks; clock delay adjustment; linear programming; optimization; relocation; retiming techniques; synchronous sequential circuits; timing improvement; Added delay; Circuit synthesis; Clocks; Linear programming; Logic programming; Optimization methods; Propagation delay; Registers; Sequential circuits; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1993, with EURO-VHDL '93. Proceedings EURO-DAC '93., European
Conference_Location :
Hamburg
Print_ISBN :
0-8186-4350-1
Type :
conf
DOI :
10.1109/EURDAC.1993.410665
Filename :
410665
Link To Document :
بازگشت