DocumentCode
1566835
Title
A study for packet buffer algorithms for a protocol processor
Author
Rajan, Vinod ; Chu, Yul
Author_Institution
Center of Cypress Southeast Design, Cypress Semicond. Cooperation, San Jose, CA, USA
Volume
1
fYear
2005
Firstpage
587
Abstract
This paper studies the performance of three conventional packet buffer algorithms for a protocol processor and proposes one algorithm to reduce packet loss ratio. The performances of these algorithms were evaluated through our simulation model. Our simulation results show that the proposed algorithm works well in reducing packet loss ratio compared to the other three conventional ones.
Keywords
buffer storage; local area networks; packet switching; protocols; packet buffer algorithms; packet loss ratio reduction; protocol processor; Algorithm design and analysis; Application software; Buffer storage; Computational modeling; Design engineering; Hardware; Heuristic algorithms; Partitioning algorithms; Performance loss; Protocols;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Technology and Applications, 2005. ICITA 2005. Third International Conference on
Print_ISBN
0-7695-2316-1
Type
conf
DOI
10.1109/ICITA.2005.45
Filename
1488870
Link To Document