An evolutionary optimization kernel using a dynamic GA-SVM model applied to analog IC design

In this paper a new design automation approach to the problem of sizing analog ICs is described. The proposed approach employs a dynamic learning scheme, based on Support Vector Machines (SVMs), which together with an evolutionary strategy is used to create feasibility models to efficiently prune the design search space during the optimization process. The proposed approach is demonstrated for the design of CMOS operational amplifiers.