DocumentCode :
1567441
Title :
Architectural considerations in a configurable DSP core for consumer electronics
Author :
Yagi, Hiromitsu ; Owen, Robert E.
Author_Institution :
Clarkspur Design Inc., Saratoga, CA, USA
fYear :
1995
Firstpage :
70
Lastpage :
81
Abstract :
This paper reviews the design methodology used to develop a new system of configurable modules for DSP in consumer electronics. To meet the various needs of low-cost consumer products required a configurable hardware architecture and a new form of instruction set to support it. The CD2450 has such an extendable architecture and instruction set. It is described and results are given on what has produced the best cost-performance designs
Keywords :
computer architecture; consumer electronics; digital signal processing chips; instruction sets; CD2450; DSP; configurable hardware architecture; consumer electronics; design methodology; instruction set; Application software; Consumer electronics; Consumer products; Cost function; Design methodology; Digital signal processing; Hardware; Silicon; Software tools; Yagi-Uda antennas;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Signal Processing, VIII, 1995. IEEE Signal Processing Society [Workshop on]
Conference_Location :
Sakai
Print_ISBN :
0-7803-2612-1
Type :
conf
DOI :
10.1109/VLSISP.1995.527478
Filename :
527478
Link To Document :
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