DocumentCode
1567493
Title
A new slot synchronization scheme robust to timing errors for W-CDMA
Author
Hwang, Sang-Yun ; Kim, Jae-Seok
Author_Institution
Dept. of Electr. & Electron. Eng., Yonsei Univ., Seoul, South Korea
Volume
3
fYear
2003
Firstpage
2038
Abstract
This paper presents a new slot synchronization scheme robust to timing errors for W-CDMA when the slot synchronization scheme is performed using a resolution of two samples per chip. The proposed scheme uses the sum of consecutive complex matched filter outputs to calculate the decision variables of all possible slot starting positions. Simulation results show that the maximum gain of the proposed scheme is about 2 dB compared to the conventional one.
Keywords
broadband networks; code division multiple access; errors; matched filters; synchronisation; 2 dB; W-CDMA; complex matched filter; slot synchronization scheme; timing errors; wideband code division multiple access; Frequency synchronization; Impedance matching; Matched filters; Multiaccess communication; Peak to average power ratio; Pulse shaping methods; Robustness; Shape; Timing; Wideband;
fLanguage
English
Publisher
ieee
Conference_Titel
Vehicular Technology Conference, 2003. VTC 2003-Spring. The 57th IEEE Semiannual
ISSN
1090-3038
Print_ISBN
0-7803-7757-5
Type
conf
DOI
10.1109/VETECS.2003.1207183
Filename
1207183
Link To Document