DocumentCode :
1568253
Title :
Upset Characterization and Test Methodology of the PowerPC405 Hard-Core Processor Embedded in Xilinx Field Programmable Gate Arrays
Author :
Allen, Gregory R. ; Swift, Gary M. ; Miller, Greg
Author_Institution :
California Inst. of Technol., Pasadena
Volume :
0
fYear :
2007
Firstpage :
167
Lastpage :
171
Abstract :
Pseudo-static upset results for memory elements in the PPC405 core embedded in a 1.5 V, 130 nm Virtex-II Pro FPGA are compared to the PPC405 core embedded in a 1.2 V, 90 nm Virtex-4 FX FPGA. The results show consistency with earlier PowerPC processor measurements and illuminate scaling trends. While details vary, the upsetable elements consistently yield very low thresholds (below LET= 2 MeV/mg/cm2 for heavy ions and 10 MeV for protons), but also small per bit limiting cross sections (below 10-7 cm2 for heavy ions and 10-14 cm2 for protons) and, therefore, moderate upset rates in space radiation environments.
Keywords :
avionics; embedded systems; field programmable gate arrays; integrated memory circuits; ion beam effects; logic testing; microprocessor chips; proton effects; PowerPC405 hard-core processor; Virtex-II Pro FPGA; Xilinx field programmable gate arrays; embedded system; heavy ion effects; memory elements; proton effects; pseudo-static upset characterization; size 130 nm; size 90 nm; space radiation environments; voltage 1.2 V; voltage 1.5 V; Field programmable gate arrays; Laboratories; Logic devices; NASA; Programmable logic arrays; Propulsion; Reconfigurable logic; Space technology; Telephony; Testing; field programmable gate array; heavy ion upsets; microprocessor faults; single event upset;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radiation Effects Data Workshop, 2007 IEEE
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-1464-2
Type :
conf
DOI :
10.1109/REDW.2007.4342559
Filename :
4342559
Link To Document :
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