DocumentCode :
1568788
Title :
Towards Hardware Ray Tracing using Fixed Point Arithmetic
Author :
Hanika, Johannes ; Keller, Alexander
Author_Institution :
Ulm Univ.
fYear :
2007
Firstpage :
119
Lastpage :
128
Abstract :
For realistic image synthesis and many other simulation applications, ray tracing is the only choice to achieve the desired realism and accuracy. Ray tracing has become such an important algorithm that an implementation in hardware is justified and desirable. The first ray tracing hardware realizations have been using floating point and logarithmic arithmetic. While floating point arithmetic requires considerably more logic than integer arithmetic, an implementation in logarithmic arithmetic is much simpler, but still suffers from similar problems. In analogy to rasterization hardware we therefore investigate the use of fixed point arithmetic for ray tracing. Our software implementation and comparisons provide strong evidence that an implementation of ray tracing in hardware using fixed point arithmetic is an efficient and robust choice.
Keywords :
field programmable gate arrays; fixed point arithmetic; floating point arithmetic; ray tracing; realistic images; FPGA; fixed point arithmetic; floating point arithmetic; hardware ray tracing; integer arithmetic; logarithmic arithmetic; rasterization hardware; realistic image synthesis; software implementation; Algorithm design and analysis; Field programmable gate arrays; Fixed-point arithmetic; Floating-point arithmetic; Graphics; Hardware; Quantization; Ray tracing; Rendering (computer graphics); Writing; I.3.1 [Computer Graphics]: Hardware Architecture¿Fixed Point Arithmetic;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Interactive Ray Tracing, 2007. RT '07. IEEE Symposium on
Conference_Location :
Ulm
Print_ISBN :
978-1-4244-1629-5
Type :
conf
DOI :
10.1109/RT.2007.4342599
Filename :
4342599
Link To Document :
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