Title :
Mismatch tolerant, continuous time, rail to rail, gain enhanced CMOS amplifiers
Author :
Cianella, M. ; Falconi, C. ; Amico, A.D. ; Scotti, G. ; Trifiletti, A.
Author_Institution :
Dipt. di Ing. Elettron., Univ. di Roma Tor Vergata, Rome
Abstract :
We describe continuous time, rail to rail, gain enhanced voltage amplifiers with a gain error which is almost insensitive to mismatch of active devices. Though the proposed approach is general, as a preliminary test we have designed a voltage amplifier in a standard 0.35 mum CMOS process; Montecarlo and AC simulations demonstrate a significant gain enhancement, its robustness against spread of process parameters and a small output resistance.
Keywords :
CMOS integrated circuits; Monte Carlo methods; amplifiers; AC simulation; Montecarlo simulation; active device mismatch; gain enhanced CMOS amplifier; preliminary test; rail to rail voltage amplifier; size 0.35 mum; CMOS process; Circuit optimization; Feedback circuits; Feedback loop; Frequency; Operational amplifiers; Performance gain; Rail to rail amplifiers; Robustness; Voltage;
Conference_Titel :
Circuit Theory and Design, 2007. ECCTD 2007. 18th European Conference on
Conference_Location :
Seville
Print_ISBN :
978-1-4244-1341-6
Electronic_ISBN :
978-1-4244-1342-3
DOI :
10.1109/ECCTD.2007.4529679
