Title :
Synthesizing optimal fixed-point arithmetic for embedded signal processing
Author_Institution :
Electr. Eng., Bucknell Univ., Lewisburg, PA, USA
Abstract :
Using fixed-point arithmetic rather than floating-point for data processing can significantly reduce the cost and power consumption of embedded systems. Unfortunately, this also shifts the burden of managing the data representation from run time to compile time, and in many cases the task of compile-time optimization must be done manually. A number of attempts have been made to formalize this process, and fixed-point methods have even been codified into an industry standard for a popular hardware-definition language, VHDL, in recent years. While the standard fixed-point libraries are certainly correct in the strict sense, they overlook an important practical consideration and may often produce results that are far from optimal. This paper discusses methods for maximizing the efficiency of fixed-point operations by careful use of the standard libraries.
Keywords :
IEEE standards; cost reduction; data structures; embedded systems; fixed point arithmetic; floating point arithmetic; hardware description languages; signal processing; VHDL; compile-time optimization; cost reduction; data processing; data representation; embedded signal processing; embedded systems; fixed-point library; fixed-point methods; fixed-point operations; floating-point; hardware-definition language; industry standard; optimal fixed-point arithmetic; power consumption; standard library; Cost function; Data processing; Embedded system; Energy consumption; Fixed-point arithmetic; Hardware; Power system management; Signal processing; Signal synthesis; Software libraries;
Conference_Titel :
Circuits and Systems (MWSCAS), 2010 53rd IEEE International Midwest Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4244-7771-5
DOI :
10.1109/MWSCAS.2010.5548561