Title :
A design methodology for low-power MCML ring oscillators
Author :
Caruso, Giuseppe ; Macchiarella, Alessio
Author_Institution :
Dipt. di Ing. Elettr., Univ. di Palermo, Palermo
Abstract :
In this paper, a low-power design method for MCML based ring oscillators is presented. The proposed method takes into account the parasitic capacitances of the MOS transistors. To validate it, some ring oscillators with different oscillation frequencies were designed in a 0.18 mum CMOS technology. SPICE simulations demonstrate the effectiveness of the design method.
Keywords :
CMOS integrated circuits; MOSFET; SPICE; integrated circuit design; low-power electronics; oscillators; CMOS technology; MOS current mode logic ring oscillators; MOS transistors; SPICE simulations; low-power design method; parasitic capacitances; size 0.18 mum; CMOS technology; Circuits; Design methodology; Frequency; Inverters; Parasitic capacitance; Propagation delay; Ring oscillators; Telecommunications; Voltage;
Conference_Titel :
Circuit Theory and Design, 2007. ECCTD 2007. 18th European Conference on
Conference_Location :
Seville
Print_ISBN :
978-1-4244-1341-6
Electronic_ISBN :
978-1-4244-1342-3
DOI :
10.1109/ECCTD.2007.4529686
