DocumentCode :
1569413
Title :
Modifications of a Dynamic-Logic Phase Frequency Detector for extended detection range
Author :
Zhang, Cheng ; Syrzycki, Marek
Author_Institution :
Dept. of Eng. Sci., Simon Fraser Univ., Burnaby, BC, Canada
fYear :
2010
Firstpage :
105
Lastpage :
108
Abstract :
This paper presents two modified architectures of a Dynamic-Logic Phase Frequency Detector (PFD) which eliminate the blind-zone problem. The PFDs have linear phase-frequency characteristics for the input phase difference outside of the blind-zone, and constant phase-frequency characteristics for the phase difference inside the blind-zone. The proposed new PFD architectures extend the detection range and eliminate the polarity reversal issue of the output. The circuits have been designed in 0.13 μm CMOS technology and the simulation results have demonstrated a detection range improvement in comparison to previously existing solutions.
Keywords :
CMOS logic circuits; phase detectors; CMOS technology; PFD architecture; blind-zone problem; constant phase-frequency characteristics; dynamic-logic phase frequency detector; extended detection range; linear phase-frequency characteristics; phase difference; size 0.13 mum; CMOS technology; Circuit simulation; Clocks; Delay; Phase detection; Phase frequency detector; Phase locked loops; Signal design; Space vector pulse width modulation; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (MWSCAS), 2010 53rd IEEE International Midwest Symposium on
Conference_Location :
Seattle, WA
ISSN :
1548-3746
Print_ISBN :
978-1-4244-7771-5
Type :
conf
DOI :
10.1109/MWSCAS.2010.5548572
Filename :
5548572
Link To Document :
بازگشت