Title :
Current source modeling in the presence of body bias
Author :
Gupta, Saket ; Sapatnekar, Sachin S.
Author_Institution :
Univ. of Minnesota, Minneapolis, MN, USA
Abstract :
With the increasing use of adaptive body biases in high-performance designs, it has become necessary to build timing models that can include these effects. State-of-the-art timing tools use current source models (CSMs), which have proven to be fast and accurate. However, a straightforward extension of CSMs to incorporate multiple body biases results in unreasonably large characterization tables for each cell. We propose a new approach to compactly capture body bias effects within a mainstream CSM framework. Our approach features a table reduction method for compact storage, and a fast and novel waveform sensitivity method for timing evaluation. On a 45 nm technology, we demonstrate high accuracy, with worst-case errors of under 5% in both slew and delay as compared to HSPICE. We show a speedup of over five orders of magnitude over HSPICE and almost 70Ã over conventional CSMs.
Keywords :
sensitivity analysis; timing circuits; waveform analysis; HSPICE; adaptive body bias; current source modeling; high performance design; table reduction method; timing evaluation; timing models; waveform sensitivity; Capacitance; Circuits; Costs; Delay; Frequency; MOS devices; Runtime; Table lookup; Threshold voltage; Timing;
Conference_Titel :
Design Automation Conference (ASP-DAC), 2010 15th Asia and South Pacific
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-5765-6
Electronic_ISBN :
978-1-4244-5767-0
DOI :
10.1109/ASPDAC.2010.5419896