DocumentCode :
1570099
Title :
A 200-μV/e- CMOS image sensor with 100-ke- full well capaclty
Author :
Adachi, Satoru ; Lee, Woonghee ; Akahane, N. ; Oshikubo, Hiromichi ; Mizobuchi, Koichi ; Sugawa, Shigetoshi
Author_Institution :
Texas Instrum. Japan, Inashiki
fYear :
2007
Firstpage :
142
Lastpage :
143
Abstract :
A high sensitivity CMOS image sensor without the dynamic range (DR) trade-off has been developed by implementing the small floating diffusion (FD) capacitance in the lateral overflow integration capacitor (CS) embedded pixel circuit. A 1/4-inch VGA chip fabricated through 0.18-μm 2P3M process achieves 200-μV/e- conversion gain with 100-ke- full well capacity, 2.2-e-rms noise floor and 93-dB DR. The S/N ratio degradation at the detection node switch from FD to FD+CS is not visible.
Keywords :
CMOS image sensors; capacitors; intelligent sensors; 2P3M process; CMOS image sensor; VGA chip fabrication; detection node switch; dynamic range; embedded pixel circuit; floating diffusion capacitance; lateral overflow integration capacitor; size 0.18 mum; CMOS image sensors; Capacitance; Capacitors; Circuit noise; Degradation; Dynamic range; Image converters; Pixel; Signal to noise ratio; Switches; CMOS image sensor; dynamic range; sensitivity;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 2007 IEEE Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-4-900784-04-8
Electronic_ISBN :
978-4-900784-05-5
Type :
conf
DOI :
10.1109/VLSIC.2007.4342690
Filename :
4342690
Link To Document :
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