Title :
Performance and Variability Optimization Strategies in a Sub-200mV, 3.5pJ/inst, 11nW Subthreshold Processor
Author :
Hanson, Scott ; Zhai, Bo ; Seok, Mingoo ; Cline, Brian ; Zhou, Kevin ; Singhal, Meghna ; Minuth, Michael ; Olson, Javin ; Nazhandali, Leyla ; Austin, Todd ; Sylvester, Dennis ; Blaauw, David
Author_Institution :
Ann Arbor Univ., Ann Arbor
Abstract :
A robust, energy efficient subthreshold (sub-Vth) processor has been designed and tested in a 0.13 mum technology. The processor consumes 11 nW at Vdd = 160 mV and 3.5 pJ/inst at Vdd = 350 mV. Variability and performance optimization techniques are investigated for sub-Vth circuits.
Keywords :
circuit optimisation; integrated circuit testing; low-power electronics; microprocessor chips; low power electronics; performance optimization techniques; power 11 nW; robust energy efficient subthreshold processor design; size 0.13 mum; variability techniques; voltage 160 mV; voltage 350 mV; Circuits; Energy consumption; Energy efficiency; Frequency; Immune system; Noise reduction; Process design; Rails; Read-write memory; Variable structure systems; body-bias; low power; subthreshold; variability;
Conference_Titel :
VLSI Circuits, 2007 IEEE Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-4-900784-05-5
Electronic_ISBN :
978-4-900784-05-5
DOI :
10.1109/VLSIC.2007.4342694
