Title :
A gain control Low Noise Amplifier for 24 GHz application
Author :
Sun, Pou-Tou ; Chan, Ssu-Chieh ; Chuang, Ying-jui
Author_Institution :
Dept. of Commun. Eng., Feng-Chia Univ., Taichung, Taiwan
Abstract :
The Low Noise Amplifier is implemented in TSMC 0.18 μm 1P6M CMOS process. Circuit architecture of the first-stage uses the cascade stage to suppress Miller effect, the second-stage at the gate control of a group received more power, and then use voltage to control gain to achieve the advantages of savings in power consumption, amplifier measurement results shows the status of low-frequency. The gain is 5.1 dB, noise figure is 7 dB and the max control range is 4dB.
Keywords :
CMOS analogue integrated circuits; MMIC amplifiers; field effect MMIC; gain control; low noise amplifiers; Miller effect suppression; TSMC 1P6M CMOS process; amplifier measurement; circuit architecture; frequency 24 GHz; gain 5.1 dB; gain control low noise amplifier; noise figure 7 dB; power consumption; CMOS integrated circuits; CMOS technology; Gain measurement; Loss measurement; Microwave communication; Radio frequency; Gain control; LNA; Miller effect;
Conference_Titel :
Cross Strait Quad-Regional Radio Science and Wireless Technology Conference (CSQRWC), 2011
Conference_Location :
Harbin
Print_ISBN :
978-1-4244-9792-8
DOI :
10.1109/CSQRWC.2011.6037034
