Title :
Design of Networks on Chips for 3D ICs
Author :
Murali, Srinivasan ; Benini, Luca ; De Micheli, Giovanni
Author_Institution :
iNoCs, Lausanne, Switzerland
Abstract :
Three-dimensional integrated circuits, where multiple silicon layers are stacked vertically have emerged recently. The 3DICs have smaller form factor, shorter and efficient use of wires and allow integration of diverse technologies in the same device. The use of Networks on Chips (NoCs) to connect components in a 3D chip is a necessity. In this short paper, we present an outline on designing application-specific NoCs for 3D ICs.
Keywords :
elemental semiconductors; network-on-chip; silicon; three-dimensional integrated circuits; 3D chip; 3D integrated circuits; Si; application-specific NoC; networks on chips design; Delay; Energy consumption; Integrated circuit interconnections; Integrated circuit technology; Network-on-a-chip; Packaging; Silicon; Three-dimensional integrated circuits; Through-silicon vias; Wire;
Conference_Titel :
Design Automation Conference (ASP-DAC), 2010 15th Asia and South Pacific
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-5765-6
Electronic_ISBN :
978-1-4244-5767-0
DOI :
10.1109/ASPDAC.2010.5419902
