Title :
A 9b, 1.25ps Resolution Coarse-Fine Time-to-Digital Converter in 90nm CMOS that Amplifies a Time Residue
Author :
Lee, Minjae ; Abidi, Asad A.
Author_Institution :
California Univ., Los Angeles
Abstract :
A 9 b 1.25 ps two step time-to-digital converter is implemented in 90 nm CMOS. It uses a new circuit to amplify the time residue, and compensates mismatch with subrange normalization. DNL and INL are, respectively, plusmn0.8 LSB and plusmn2 LSB. It can be used as a phase detector with digital output.
Keywords :
CMOS digital integrated circuits; amplifiers; phase detectors; CMOS; phase detector; size 90 nm; time amplifier; time-digital converter; Circuits; Delay lines; Detectors; Inverters; Metastasis; Phase detection; Phase locked loops; Propagation delay; Strontium; Voltage; time amplifier; time-to-digital converter (TDC); two step architecture and subrange normalization;
Conference_Titel :
VLSI Circuits, 2007 IEEE Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-4-900784-04-8
Electronic_ISBN :
978-4-900784-05-5
DOI :
10.1109/VLSIC.2007.4342701
