• DocumentCode
    1570551
  • Title

    A 0.5V 8bit 10Msps Pipelined ADC in 90nm CMOS

  • Author

    Shen, Junhua ; Kinget, Peter

  • Author_Institution
    Columbia Univ., New York
  • fYear
    2007
  • Firstpage
    202
  • Lastpage
    203
  • Abstract
    A true low voltage 0.5 V 8 bit pipelined A/D converter is realized in 90 nm CMOS technology using regular Vtau devices. A cascaded sampling technique is used to combat the OFF leakage of the switches. The converter prototype occupies 0.85 mm2; operating at 10 Msps, it consumes 2.4 mW and achieves an SNDR of 48.1 dB with a 0.4 Vppdiff full-scale input.
  • Keywords
    CMOS digital integrated circuits; analogue-digital conversion; pipeline processing; A/D converter; CMOS technology; OFF leakage; cascaded sampling technique; pipelined A/D converter; power 2.4 mW; size 90 nm; voltage 0.5 V; word length 8 bit; CMOS technology; Capacitors; Circuits; Clocks; Immune system; Low voltage; MOS devices; Prototypes; Sampling methods; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits, 2007 IEEE Symposium on
  • Conference_Location
    Kyoto
  • Print_ISBN
    978-4-900784-05-5
  • Electronic_ISBN
    978-4-900784-05-5
  • Type

    conf

  • DOI
    10.1109/VLSIC.2007.4342715
  • Filename
    4342715
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1570551