• DocumentCode
    1570844
  • Title

    A Fully Integrated 36MHz to 230MHz Multiplying DLL with Adaptive Current Tuning

  • Author

    Hsiao, Keng-Jan ; Lee, Tai-Cheng

  • Author_Institution
    Nat. Taiwan Univ., Taipei
  • fYear
    2007
  • Firstpage
    230
  • Lastpage
    231
  • Abstract
    A multiplying-DLL based frequency synthesizer with a fully-integrated loop capacitor employs an adaptive current adjusting loop to generate a low-jitter clock for LCD panel applications. The measured RMS jitter is 3.5 ps for 229.5-MHz output clock. The frequency synthesizer occupies 0.09 mm2 active area in a 0.18-mum CMOS technology and consumes 9 mW from a 1.8-V supply.
  • Keywords
    CMOS integrated circuits; VHF circuits; circuit tuning; clocks; delay lock loops; driver circuits; frequency synthesizers; impedance convertors; jitter; low-power electronics; CMOS technology; LCD panel applications; adaptive current tuning; frequency 36 MHz to 230 MHz; frequency synthesizer; fully-integrated loop capacitor; low-jitter clock; multiplying DLL; power 9 mW; size 0.18 mum; voltage 1.8 V; Capacitors; Charge pumps; Clocks; Error correction; Feedback; Frequency synthesizers; Jitter; Operational amplifiers; Q factor; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits, 2007 IEEE Symposium on
  • Conference_Location
    Kyoto
  • Print_ISBN
    978-4-900784-05-5
  • Electronic_ISBN
    978-4-900784-05-5
  • Type

    conf

  • DOI
    10.1109/VLSIC.2007.4342730
  • Filename
    4342730
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1570844