Avoiding false paths caused by resource binding in RTL delay analysis

In this paper, we present an accurate delay estimation algorithm at the register transfer level. We introduce “resource binding” as on important source of false paths in a register transfer level structure. The existence and creation of such paths and their effect in delay analysis are discussed. We also introduce the Propagation Delay Graph (PDG), whose traversal, for delay analysis, is equivalent to the traversal of sensitizable paths in the datapath