DocumentCode
1571156
Title
A floorplanning algorithm for novel three-dimensional nano integrated circuits
Author
Luo, Rong ; Zhang, Xi ; Shi, Shengqing ; Sun, Peng
Author_Institution
Dept. of Electron. Eng., Tsinghua Univ., Beijing, China
fYear
2010
Firstpage
857
Lastpage
860
Abstract
A floorplanning algorithm for novel carbon nanotube based three-dimensional integrated circuits is proposed. It is based on ant colony algorithm. The proposed algorithm can optimize the area and area-delay for the single device layer in the three-dimensional integrated circuits, and then optimize the whole 3D IC´s area and delay. After the optimization, the performance can improve about 15%.
Keywords
carbon nanotubes; integrated circuit layout; nanotechnology; optimisation; 3D IC area; 3D IC delay; ant colony algorithm; carbon nanotube; floorplanning algorithm; optimization; three-dimensional nano integrated circuits; Ant colony optimization; Carbon nanotubes; Conducting materials; Conductivity; Copper; Delay; Integrated circuit interconnections; Organic materials; Three-dimensional integrated circuits; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (MWSCAS), 2010 53rd IEEE International Midwest Symposium on
Conference_Location
Seattle, WA
ISSN
1548-3746
Print_ISBN
978-1-4244-7771-5
Type
conf
DOI
10.1109/MWSCAS.2010.5548669
Filename
5548669
Link To Document