Title :
Novel designs of 8-port memory cell
Author :
Chang, Jian ; Koppanathi, Raghu ; Johnson, Louis G.
Author_Institution :
Texas Instrum., Inc., Dallas, TX, USA
Abstract :
A general procedure to calculate the stability of the multiport memory cell is proposed. Four novel architectures of the 8-port memory cell are introduced to improve the access time. With the same read access time and silicon area for all the designs, the proposed 6-inverter memory cell has the maximum noise margin.
Keywords :
memory architecture; 6-inverter memory cell; 8-port memory cell; architecture; maximum noise margin; multiport memory cell; read access time; silicon area; stability; Capacitance; Circuit noise; Computer architecture; Decision support systems; Equations; Instruments; Inverters; MOS devices; Stability; Threshold voltage; SRAM; noise margin; register file;
Conference_Titel :
Circuits and Systems (MWSCAS), 2010 53rd IEEE International Midwest Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4244-7771-5
DOI :
10.1109/MWSCAS.2010.5548682
