DocumentCode :
1571475
Title :
Best-so-far vs. where-you-are: New perspectives on simulated annealing for CAD
Author :
Boese, Kenneth D. ; Kahng, Andrew B. ; Tsao, Chung-Wen Albert
Author_Institution :
Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
fYear :
1993
Firstpage :
78
Lastpage :
83
Abstract :
The simulated annealing (SA) algorithm has been applied to every difficult optimization problem in VLSI (very large scale integration) CAD. Existing SA implementations use monotone decreasing, or cooling, temperature schedules motivated by the algorithm\´s proof of optimality as well as by an analogy with statistical thermodynamics. This paper gives strong evidence that challenges the correctness of using such schedules. Specifically, the theoretical framework under which monotone cooling schedules is proved optimal fails to capture the practical application of simulated annealing. In practice, the algorithm runs for a finite rather than infinite amount of time; and the algorithm returns the best solution visited during the entire run ("best-so-far") rather than the last solution visited ("where-you-are"). For small instances of classic VLSI CAD problems, the authors determine annealing schedules that are optimal in terms of the expected quality of the best-so-far solution. These optimal schedules do not decrease monotonically, but are in fact either periodic or warming. (When the goal is to optimize the cost of the where-you-are solution, they confirm the traditional wisdom of cooling.) The results open up many new research directions, particularly how to choose annealing temperatures dynamically to optimize the quality of the finite time, best-so-far solution
Keywords :
VLSI; circuit layout CAD; graph theory; integrated circuit design; simulated annealing; CAD; VLSI; VLSI CAD; best so far analysis; cooling; cost; monotone decreasing; optimal schedules; optimization; periodic schedules; simulated annealing; temperature schedules; warming schedules; Computational modeling; Computer science; Computer simulation; Cooling; Cost function; Optimal scheduling; Scheduling algorithm; Simulated annealing; Temperature; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1993, with EURO-VHDL '93. Proceedings EURO-DAC '93., European
Conference_Location :
Hamburg
Print_ISBN :
0-8186-4350-1
Type :
conf
DOI :
10.1109/EURDAC.1993.410698
Filename :
410698
Link To Document :
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