DocumentCode
1571655
Title
A new iterative structure for hardware division: the parallel paths algorithm
Author
Rice, Eric ; Hughey, Richard
Author_Institution
Dept. of Comput. Eng., California Univ., Santa Cruz, CA, USA
fYear
2003
Firstpage
54
Lastpage
62
Abstract
We present a new approach to hardware division - the parallel paths algorithm. In this approach, prescaling allows the division recurrence to be implemented by three processes which can be calculated in parallel during iterations. While two of the processes must complete in a single iteration, the third - which includes the most expensive division operations - can be calculated over multiple iterations. Iteration latency is determined by the slowest of the three paths, and in many cases can be limited to that of carry-save addition and latching. A radix-4 implementation of the algorithm is shown to achieve better performance than other commonly used methods while requiring a modest increase in area.
Keywords
digital arithmetic; iterative methods; parallel algorithms; carry-save addition; computer arithmetic; division recurrence; hardware division; iteration latency; iterative structure; linear convergence; parallel paths algorithm; radix-4 implementation; Acceleration; Concurrent computing; Convergence; Delay; Digital arithmetic; Equations; Hardware; Iterative algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic, 2003. Proceedings. 16th IEEE Symposium on
ISSN
1063-6889
Print_ISBN
0-7695-1894-X
Type
conf
DOI
10.1109/ARITH.2003.1207660
Filename
1207660
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