Efficiency system for DSP algorithms on embedded ARM PXA processors

Energy awareness and management are two vital concepts essential to the successful operation and application of embedded computing systems. Furthermore, embedded systems need to be equipped with high performance processors under specific embedded environmental conditions. The purpose of this project is an in-depth technical comparison of energy and performance for the ARM PXA processor operation vs. Conventional DSPs, via digital signal processing code development. The parameters and tools for our comparison included: memory and cache management (primarily the effects various data set sizes have on the use and misuse of cache). We will quantify these metrics using In-Line Assembler to access the ARM PXA Performance Monitoring Registers. Initially we tested out these parameters via a basic FIR filter design. Our testing scenarios then involved a more elaborate signal processing algorithm, namely, a fixed point 1-D and 2-D FFT, thereby conclusively proving the origins and strategies for optimization within this reference frame.