A 1 GHz CMOS current-folded direct digital RF quadrature modulator

Author

Zhou, Yijun ; Yuan, Jiren

Author_Institution

Inst. for Infocomm Res., Singapore, Singapore

fYear

2005

Firstpage

25

Lastpage

28

Abstract

This paper describes a CMOS current-folded direct digital RF quadrature modulator, which uses two 10-bit linear interpolation current steering digital-to-analog converters (DACs) and two current-folded double-balanced mixers. The attenuation of the DAC image components is significantly increased with linear interpolation, and the reconstruction filter is therefore eliminated. The DAC baseband differential current signals are fed to the mixer by current-folded structures, which realize the low voltage design and improve the linearity of the modulated RF signal. The chip has been implemented with a 0.35 μm, double-poly and triple-metal CMOS process.

Keywords

CMOS integrated circuits; UHF integrated circuits; UHF mixers; digital-analogue conversion; interpolation; modulators; 0.35 micron; 1 GHz; 3.3 V; CMOS current-folded modulator; DAC image component attenuation; current-folded double-balanced mixers; direct digital RF quadrature modulator; linear interpolation current steering DAC; low voltage operation; mixer baseband differential current signals; modulated signal linearity; Attenuation; Baseband; Digital modulation; Digital-analog conversion; Image reconstruction; Interpolation; Low voltage; Nonlinear filters; RF signals; Radio frequency;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE

ISSN

1529-2517

Print_ISBN

0-7803-8983-2

Type

conf

DOI

10.1109/RFIC.2005.1489177

Filename

1489177