Title :
A multi-converter DFT technique for complex SIP: Concepts and validation
Author :
Kerzérho, V. ; Cauvet, P. ; Bernard, S. ; Azais, F. ; Comte, M. ; Renovell, M.
Author_Institution :
Philips France Semiconducteurs, Caen, France
Abstract :
This paper presents a new technique called ldquoAnalog Network of Convertersrdquo that allows to test a set of ADCs and DACs embedded in a complex circuit as SiP and SoC. It presents an experimental validation of this new concept that permits to reduce drastically the testing time and requires only a low cost digital ATE.
Keywords :
analogue-digital conversion; automatic test equipment; design for testability; digital-analogue conversion; system-in-package; system-on-package; ADC test; DAC test; SiP; SoC; analog network converter; low cost digital ATE; multiconverter DFT technique; testing time reduction; Analog-digital conversion; Circuit testing; Costs; Crosstalk; Equations; Instruments; Packaging; Performance evaluation; System testing; System-on-a-chip;
Conference_Titel :
Circuit Theory and Design, 2009. ECCTD 2009. European Conference on
Conference_Location :
Antalya
Print_ISBN :
978-1-4244-3896-9
Electronic_ISBN :
978-1-4244-3896-9
DOI :
10.1109/ECCTD.2009.5275087
